The ε12 Muting / Protect Circuit

Schematic diagram

The following is the schematic diagram of the ε12.

Circuit Description

D1, Q1 and Q2 form a simple voltage regulator to provide the ±12V rails for use by the circuit. U1, a OPA551 high current opamp operating as a voltage follower with unity gain, is used as a virtual ground rail splitter. This chip is used for its high current capability, and is needed because the relay coil current flows through it. VR1 is a trimpot that sets the zero reference voltage. The use of a rail splitter here allows the ε12 to support monitoring of amplifiers with active ground outputs. A neat by-product of the rail splitter, is that the circuit will draw the same amount of current from each rail (the relay coil current is sourced from one rail, and sunk by the OPA551 and redirected to the opposite rail). Thus it will not cause an imbalance in the drain-down time of the positive and negative supply rail capacitors after turn-off.

Q5 is a Darlington transistor for driving the relay. The time delay is accomplished by the charging of C7 through R11 after turn-on. The default values of these gives approximately 3 seconds delay. To increase the time, increase the value of R11.

U2 is an inverting summing amplifier with a voltage gain of 10. It is also limited in frequency response with a low-pass corner frequency of 1.6Hz. This amplifies the DC offset signal from all the channels being monitored, which is then fed to Q3 and Q4. These two transistors provide positive and negative DC offset detection, respectively, and shunts C7 if the offset exceeds their turn on thresholds, causing the relay to disengage. The diodes D3 and D4 clamps the opamp's inputs for overvoltage protection.

The schematic shows four inputs (IL, IR, G1, G2) and four outputs (OL, OR, G1, G2) which corresponds to a four-channel (balanced output) amp configuration. For a three-channel amp, just use one of the "-" inputs and outputs for the shared ground channel. For a traditional two-channel amp, you should skip the G1 and G2 connections.

Notes

  • The OPA551 pin numbers shown in the schematic refer to the DIP-8 and SOIC-8 versions of the chip. The DDPAK version has different pin number assignments. See the datasheet for details.
  • Depending on your choice of relay and case ventilation, attach a clip-on heatsink to your OPA551 if it gets hot to the touch.
  • If your supply rail voltage is higher than ±18V, attach TO-92 clip-on heatsinks to the Q1 and Q2 transistors.

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